Senior AMS Design Verification Engineer
vor 2 Wochen
Compensation: The estimated annual salary for this position is around $120,000-$180,000 depending on the candidate's experience and qualifications.
At Apple Inc., we strive to innovate and push boundaries in the field of mixed-signal design verification. As a key member of our Munich-based team, you will have the opportunity to craft cutting-edge products that meet the high standards of quality and performance expected by our customers.
Your primary responsibility as a Design Verification Engineer will be to ensure bug-free first silicon for our mixed-signal designs. This involves all phases of pre-silicon verification, including construction of verification environments, coding of test scenarios and assertions, and collaboration with Analog and Digital Design engineers.
Main Responsibilities:
- Design and implementation of Self-checking verification environments using the SystemVerilog UVM library
- Performance-based analysis and power-related scenario design for early power estimation
- Deliveries of tests for design and test engineering teams
- Gate-level verification (power and timing)
- Lab bring-up support
Our team focuses on research and innovations to improve verification techniques and tools for mixed-signal systems, aiming to increase efficiency and quality. You will be part of this dynamic team, establishing cutting-edge concepts and methods to support their work.
Requirements:
- Knowledge of System Verilog test-bench language and UVM (Universal Verification Methodology)
- Hands-on experience with constrained random verification environments
- Basic design background in support of verification results analysis
- Knowledge of Object Oriented Programming (OOP)
- Proficiency in English language is required
PREFERRED QUALIFICATIONS:
- Master's degree or PhD in Electrical/Computer Engineering or proven industrial experience/degree equivalent
- Hands-on experience with Assertion Based Verification
- Familiarity with system design using C++, Python or Verilog
- Familiarity with FPGA emulation platforms
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