Verification Specialist
Vor 2 Tagen
Job Overview:
We are looking for a highly skilled Verification Specialist - Mixed Signal Design to join our team in Munich. This role is perfect for individuals who enjoy working on complex challenges and are passionate about delivering high-quality products.
About the Role:
As a Verification Specialist, you will be responsible for designing and implementing self-checking verification environments for multi-layer systems using the SystemVerilog UVM library. You will work closely with Analog and Digital Design engineers to ensure bug-free first silicon.
Key Responsibilities:
- Definition and design of verification environments
- Coding of test scenarios and assertions
- Close collaboration with design teams
- Delivery of tests for design and test engineering teams
- Gate-level verification (power and timing)
- Lab bring-up support
Requirements:
- Master's degree or PhD in Electrical/Computer Engineering or proven industrial experience/degree equivalent
- Hands-on experience with Assertion Based Verification
- Familiarity with system design using C++, Python or Verilog
- Familiarity with FPGA emulation platforms
Salary Range: The estimated salary for this position is $150,000-$200,000 per year.
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