Senior Staff Engineer Digital Design
vor 3 Wochen
Be responsible for the digital design (SystemVerilog), verification , simulation , synthesis and related sign-off checks Define digital algorithms and architectures Closely cooperate with analog and digital designers as well as concept and verification engineers Implement design-for-test concepts Support hardware post-silicon validation in the lab We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group H ( The monthly salary is paid 14 times We offer a higher compensation depending on your expertise and skills.
You are best equipped for this task if you have:
A degree in Electrical Engineering , Information Technology , Telematics or comparable with focus on electronics 5+ years of digital design experience Good knowledge of HDL ( VHDL, Verilog, System Verilog ) and Unix programming languages Proficient experience using simulation on RTL and gate-level , synthesis , equivalence checking , CDC Knowledge of SystemC , mixed-signal design , STA as a plus Fluent English skills with German skills as a plus
Benefits
Coaching, mentoring networking possibilities Wide range of training offers & planning of career development International assignments Different career paths: Project Management, Technical Ladder, Management & Individual Contributor Flexible working conditions Home office options Part-time work possible (also during parental leave) Sabbatical Child care in Villach & Klagenfurt On-site social counselling and works doctor Health promotion programs On-site canteen Private insurance offers Wage payment in case of sick leave Corporate pension benefits Flexible transition into retirement Performance bonus Accessibility, access for wheelchairs-
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