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NXP Semiconductors N.V. is seeking a Principal Digital Design Engineer to join the SERDES Networking Solutions team.You will define block requirements, architect digital cores, and lead a team delivering automotive-grade transceivers for in-vehicle networks with emphasis on performance and reliability. You will collaborate with architecture, digital/analog,...

ams OSRAM is seeking a senior verification engineer to develop and maintain comprehensive signoff flows for DRC, LVS, ERC, and antenna checks across CMOS technologies. You will work with layout, design, and technology teams to ensure tape-out readiness and robustness of signoff methodologies.The role requires a minimum of 10 years in the semiconductor...

Infineon Technologies Austria AG in Austria seeks a Senior Layout Engineer to lead full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal components. You will optimize layouts, verify with DRC/LVS/ERC, and manage parasitics to ensure power and signal integrity.The role requires 5+ years in CMOS/FinFET technologies, strong CAD...

Infineon Technologies Austria AG in Austria seeks a Senior Layout Engineer to lead full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal components.Bewerben Sie sich schnell, um Ihre Chancen auf ein Vorstellungsgespräch zu erhöhen Lesen Sie die vollständige Stellenbeschreibung unten.You will optimize layouts, verify with...

Infineon Technologies AG in Austria is seeking an experienced IC layout engineer to drive full-custom layout for ADC mixed-signal components, from schematic through tape-out, with a focus on robustness and manufacturability.Bewerben Sie sich (indem Sie auf die entsprechende Schaltfläche klicken), nachdem Sie alle Informationen zu dieser Stelle durchgelesen...

Job descriptionDevelop and maintain Synopsys IC Validator (ICV), Siemens Calibre, Cadence PVS rule decks for Design Rule Checking (DRC), Layout Versus Schematic (LVS), Electrical Rule Checking (ERC), and antenna verification across multiple semiconductor technologiesExecute physical signoff verification flows using Synopsys IC Validator, Simens Calibre,...

Full Custom Layout: Execute full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal components. Layout Optimization: Implement precise matching techniques and isolation strategies to prevent noise coupling in sensitive analog front-ends. Physical Verification: Run and debug full-chip physical verifications, including DRC, LVS,...

Full Custom Layout: Execute full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal components. Layout Optimization: Implement precise matching techniques and isolation strategies to prevent noise coupling in sensitive analog front-ends. Physical Verification: Run and debug full-chip physical verifications, including DRC, LVS,...

Infineon Technologies AG in Austria is seeking an experienced IC layout engineer to drive full-custom layout for ADC mixed-signal components, from schematic through tape-out, with a focus on robustness and manufacturability.You will lead a small layout team, mentor engineers, and collaborate with ADC design engineers across global teams, applying precise...

ams OSRAM is seeking a senior verification engineer to develop and maintain comprehensive signoff flows for DRC, LVS, ERC, and antenna checks across CMOS technologies. You will work with layout, design, and technology teams to ensure tape-out readiness and robustness of signoff methodologies. The role requires a minimum of 10 years in the semiconductor...

Job description * Develop and maintain Synopsys IC Validator (ICV), Siemens Calibre, Cadence PVS rule decks for Design Rule Checking (DRC), Layout Versus Schematic (LVS), Electrical Rule Checking (ERC), and antenna verification across multiple semiconductor technologies * Execute physical signoff verification flows using Synopsys IC Validator, Simens...

ResponsibilitiesFull Custom Layout: Execute full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal componentsLayout Optimization: Implement precise matching techniques and isolation strategies to prevent noise coupling in sensitive analog front-endsPhysical Verification: Run and debug full-chip physical verifications, including...

#WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problem solvers behind tomorrow’s technology. As a Senior Engineer Analog Mixed-Signal Design on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects,...

About The Company GROPYUS is a technology-based construction company focused on building multi‑story residential buildings. Thanks to its prefabricated building system with various design options, industrial offsite construction, and fully digitalized processes, the company manufactures aspirational, sustainable, and affordable homes using timber...

2 Teilen Bereitstellungslokführer:in Quereinstieg, Bludenz ÖBB-Produktion GmbH Bludenz, Vorarlberg 6700 AUT Schichtdienst Fixzeit mit SonnFeiertage 38,5 Std. req23520 Wir möchten neue Wege gehen. Und neue Wege schaffen. Heute. Für morgen. Für uns. Jetzt Teil des #TeamOEBB werden! Starte im Jahr 2027 deine Ausbildung zur:zum...

Infineon Technologies Austria AG in Austria seeks a Senior Layout Engineer to lead full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal components. You will optimize layouts, verify with DRC/LVS/ERC, and manage parasitics to ensure power and signal integrity. The role requires 5+ years in CMOS/FinFET technologies, strong CAD...

Sie begeistern sich für Daten, Analysen und Künstliche Intelligenz? Dann werden Sie Teil unseres Teams und verwandeln Sie Daten in wertvolle Erkenntnisse für den Unternehmenserfolg. * Erarbeiten und Umsetzen von Auswertungen aus unserem ERP System (ABAS) mit Analysis Services und Power BI * Bedarfsanalysen, Datenmanagement, Erstellen von Dashboards und...

ResponsibilitiesFull Custom Layout: Execute full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal componentsLayout Optimization: Implement precise matching techniques and isolation strategies to prevent noise coupling in sensitive analog front-endsPhysical Verification: Run and debug full-chip physical verifications, including...

About The CompanyGROPYUS is a technology-based construction company focused on building multi-story residential buildings. Thanks to its prefabricated building system with a wide range of design options, automated offsite construction, and fully digitalized processes, the company is able to create resilient timber housing quickly and cost-effectively....

Full Custom Layout: Execute full-custom IC and block-level layout from schematic to tape-out for ADC mixed-signal components. Layout Optimization: Implement precise matching techniques and isolation strategies to prevent noise coupling in sensitive analog front-ends. Physical Verification: Run and debug full-chip physical verifications, including DRC, LVS,...