Senior Frontend PHY IC Design Engineer
vor 3 Monaten
This is a Senior Frontend PHY IC Design Engineer (DSP focus) role with one of the leading companies in AU right now 🔥 -- Morse Micro -- with an amazing team. They are continuing to grow rapidly. This is the chance to join right as the 🚀 takes off.
More About the Role at Morse Micro 🧐🧐
You will be responsible for the design, integration, verification and bring-up of an IEEE 802.11ah PHY to be used in Morse Micro’s family of Wi-Fi chips. You’ll work with the digital, systems and firmware teams to help architect and verify the PHY and ensure functional and performance goals are achieved. Applicants will need to be experienced with digital PHY architecture and DSP design suitable for 802.11 protocols on advanced low-power process nodes. Your day-to-day will involve RTL design and simulation using contemporary languages and tools. You’ll work closely with the team to address and improve digital and system aspects of the design. You’ll also help with bringup of the PHY on silicon, evaluate performance of pre-production silicon and take your design to high-volume mass production. **Your responsibilities would include:** - 802.11ah PHY development in Scala (Chisel), System Veriliog and C - Functional verification of 802.11ah PHY in RTL simulators, SDF-annotated gate level simulators and AMS simulators using SystemVerilog, Verilog-A, Matlab, C and Python - Work closely with the Systems team to achieve the best performance - Work closely with the Analog & RF to define and improve radio interface - Work closely with the Firmware team to develop embedded PHY firmware - Assist with bring-up of silicon in the lab & debug PHY performance - Provide overall technical expertise and brilliance **Essential skills**_ (you must have):_ - Bsc/MSc/Phd in Electrical / Electronics / Communication Engineering or Computer Science - 5+ years experience as a PHY IC Design Engineer - Solid understanding of digital signal processing (DSP) , with emphasis on HW implementation - Proven experience developing multiple DSP blocks of in complex SoCs - A deep understanding of the IEEE 802.11 PHY layer and familiarity with 802.11ah - A deep understanding of digital design fundamentals including low power and multi-clock-domain design - Hands-on experience with the Cadence or Synopsys simulation suite - Hands-on experience with Linux development environment staples such as make, shell scripts and Python - Excellent verbal and written communication skills - Proven to work constructively within your team and among other groups - Strong analytical and problem-solving skills - A determination to deliver even when subject to time pressures - A hands-on, practical attitude **Bonus skills (these will make you stand out in your application):** - Proven experience performing phy bring up, debug and performance measurement on silicon in the lab - A good understanding of embedded processors, familiarity with RISC-V is a plus - A solid understanding of mixed signal ASIC design and simulation - Experience using the git revision control tool - Experience with development and debugging of digital designs from RTL design through
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